Product Summary
The PDTC114ET is an NPN resistor-equipped transistor.
Parametrics
PDTC114ET absolute maximum ratings: (1)VCBO collector-base voltage: 50 V; (2)VCEO collector-emitter voltage: 50 V; (3)VEBO emitter-base voltage: 10 V; (4)VI input voltage, positive: 40 V; negative: -10 V; (5)IO output current (DC): 100 mA; (6)ICM peak collector current: 100 mA; (7)Tstg storage temperature: -65 to +150 ℃; (8)Tj junction temperature: -150 ℃; (9)Tamb operating ambient temperature: -65 to +150 ℃.
Features
PDTC114ET features: (1)Built-in bias resistors; (2)Simplified circuit design; (3)Reduction of component count; (4)Reduced pick and place costs.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||
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PDTC114ET /T3 |
NXP Semiconductors |
Transistors Switching (Resistor Biased) TRANS RET TAPE-11 |
Data Sheet |
Negotiable |
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PDTC114ET,215 |
NXP Semiconductors |
Transistors Switching (Resistor Biased) TRANS RET TAPE-7 |
Data Sheet |
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PDTC114ET,235 |
NXP Semiconductors |
Transistors Switching (Resistor Biased) TRANS RET TAPE-11 |
Data Sheet |
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